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doc:lighthouse:bootloader [2019-02-20 14:51] arnaud |
doc:lighthouse:bootloader [2019-03-10 12:08] arnaud [Uart protocol] |
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====== Lighthouse deck bootloader ====== | ====== Lighthouse deck bootloader ====== | ||
- | <WRAP center round important 70%> | + | The [[projects:crazyflie2: |
- | **Warning**: This documentation | + | |
- | </WRAP> | + | |
- | The lighthouse deck is based on an [[https://www.latticesemi.com/Products/FPGAandCPLD/ | + | The bootloader protocol |
- | + | ||
- | The bootloader protocol is inspired by the [[https://github.com/tinyfpga/TinyFPGA-Bootloader|TinyFpga USB bootloader]] but implemented on serial port and I2C bus. | + | |
===== Interface protocols ===== | ===== Interface protocols ===== | ||
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==== Uart protocol ==== | ==== Uart protocol ==== | ||
- | There is two UARTs on the deck, UART0 on te Crazyflie deck interface and UART1 on 2.54mm soldering pads available for external communication. The bootloader is available on both UART. The UARTs are setup at a baudrate of 115200. | + | There is two UARTs on the deck, UART0 on the Crazyflie deck interface and UART1 on 2.54mm soldering pads available for external communication. The bootloader is available on both UARTs. The UARTs are setup with a baudrate |
+ | |||
+ | <WRAP center round important> | ||
+ | **Warning**: | ||
+ | </ | ||
When using the UART, commands are sent on the RX line and answer will be sent back by the bootloader on the TX line. Since the bootloader and the Flash SPI bus are working much faster than the UART, there is no need for flow control. | When using the UART, commands are sent on the RX line and answer will be sent back by the bootloader on the TX line. Since the bootloader and the Flash SPI bus are working much faster than the UART, there is no need for flow control. | ||
- | To make sure the boorloader | + | To make sure the bootloader |
- | Both UART are disabled at startup, this means that the bootloader will ignore all data and break condition coming from them. To enable an UART send the byte " | + | Both UARTs are disabled at startup, this means that the bootloader will ignore all data and break condition coming from them. To enable an UART send the byte " |
- | Since 0xBC is not an implemented command. The suggested sequence in order to start the communication is sending "Break condition" | + | Since 0xBC is not an implemented command, the suggested sequence in order to start the communication is sending "Break condition" |
<WRAP center round info> | <WRAP center round info> | ||
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==== SPI Exchange ==== | ==== SPI Exchange ==== | ||
- | The SPI exchange command | + | The SPI exchange command |
Sent to the bootloader: | Sent to the bootloader: | ||
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^ Byte # ^ Value ^ Note ^ | ^ Byte # ^ Value ^ Note ^ | ||
| 0-(RLEN-1) | | 0-(RLEN-1) | ||
+ | |||
+ | ==== Get version ==== | ||
+ | |||
+ | Returns the bootloader version. Can be useful to identify that the firmware currently running is the bootloader. | ||
+ | currently only version 1 exists | ||
+ | |||
+ | Sent to the bootloader: | ||
+ | |||
+ | ^ Byte # ^ Value ^ Note ^ | ||
+ | | 0 | 0x02 | Get version command | | ||
+ | |||
+ | Received from the bootloader: | ||
+ | |||
+ | ^ Byte # ^ Value ^ Note ^ | ||
+ | | 0 | 0x01 | Bootloader version | | ||
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</ | </ | ||
- | The write protection is implemented by setting the SR1 register in the SPI flash memory. This means that it can be disabled by clearing the SR1 register if updating the bootloader is required. | + | The write protection is implemented by setting the SR1 register in the SPI flash. This means that it can be disabled by clearing the SR1 register if updating the bootloader is required. |
===== Firmware versioning ===== | ===== Firmware versioning ===== | ||
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The firmware is an iCE40 bitstream ((The bitstream format has been [[http:// | The firmware is an iCE40 bitstream ((The bitstream format has been [[http:// | ||
- | The version string format is **TBD**. | + | The version string format is a base 10 integer number in ascii indicating the version. For example " |
+ | |||
+ | In the context of the lighthouse firmware, versions >= 1 are released version and should be in parity (or handled) by the client connecting the board in order to boot the firmware. Versions <= 0 are development version and the intention is that the client will then boot it without further check. | ||
+ | This format is simple enough for current needs and allows to add other fields later by separating it from the version with any non-decimal character. | ||