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doc:lighthouse:bootloader [2019-02-26 17:22]
arnaud 		doc:lighthouse:bootloader [2019-03-10 12:11]
arnaud [Bootloader protocol]
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 ====== Lighthouse deck bootloader ====== ====== Lighthouse deck bootloader ======
- 
-<WRAP center round important 70%> 
-**Warning**: This documentation is currently a work-in-progress working document. None of this is final. 
-</WRAP> 
  
 The [[projects:crazyflie2:expansionboards:lighthouse|lighthouse deck]] is based on an [[https://www.latticesemi.com/Products/FPGAandCPLD/iCE40UltraPlus|iCE40UP5K]] FPGA. The FPGA boots from an SPI flash to the bootloader, it is then able to boot to another configuration image. The bootloader gives access to the SPI memory and to a boot command to boot the user image. This allows the deck to be updated easily from the Crazyflie or from the auxiliary serial port. The [[projects:crazyflie2:expansionboards:lighthouse|lighthouse deck]] is based on an [[https://www.latticesemi.com/Products/FPGAandCPLD/iCE40UltraPlus|iCE40UP5K]] FPGA. The FPGA boots from an SPI flash to the bootloader, it is then able to boot to another configuration image. The bootloader gives access to the SPI memory and to a boot command to boot the user image. This allows the deck to be updated easily from the Crazyflie or from the auxiliary serial port.
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 ==== Uart protocol ==== ==== Uart protocol ====
  
-There is two UARTs on the deck, UART0 on the Crazyflie deck interface and UART1 on 2.54mm soldering pads available for external communication. The bootloader is available on both UARTs. The UARTs are setup with a baudrate of 115200.+There is two UARTs on the deck, UART0 on the Crazyflie deck interface and UART1 on 2.54mm soldering pads available for external communication. The bootloader is available on both UARTs. The UARTs are setup with a baudrate of 113200, one stop bit, no parity. 
 + 
 +<WRAP center round important> 
 +**Warning**: Version 1 of the bootloader has a bug that makes its baudrate be ~113200 instead of 115200 baud. This is a non-standard baudrate, it has been tested that using an FTDI USB-to-UART adapter setting a baudrate of 113200 works fine. 
 +</WRAP> 
  
 When using the UART, commands are sent on the RX line and answer will be sent back by the bootloader on the TX line. Since the bootloader and the Flash SPI bus are working much faster than the UART, there is no need for flow control. When using the UART, commands are sent on the RX line and answer will be sent back by the bootloader on the TX line. Since the bootloader and the Flash SPI bus are working much faster than the UART, there is no need for flow control.
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 ===== Bootloader protocol ===== ===== Bootloader protocol =====
  
-All numbers are expressed in little endian. +All numbers are encoded in little endian. 
  
 ==== Boot ==== ==== Boot ====
Line 67: Line 68:
 ^  Byte #  ^  Value  ^ Note ^ ^  Byte #  ^  Value  ^ Note ^
 |  0-(RLEN-1)  | Read data | Data read from the SPI device | |  0-(RLEN-1)  | Read data | Data read from the SPI device |
 +
 +==== Get version ====
 +
 +Returns the bootloader version. Can be useful to identify that the firmware currently running is the bootloader.
 +currently only version 1 exists
 +
 +Sent to the bootloader:
 +
 +^  Byte #  ^  Value  ^ Note ^
 +|  0       | 0x02   | Get version command |
 +
 +Received from the bootloader:
 +
 +^  Byte #  ^  Value  ^ Note ^
 +|  0  | 0x01 | Bootloader version |
  
  
doc/lighthouse/bootloader.txt · Last modified: 2020-05-12 14:36 by kimberly

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