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projects:crazyflie2:expansionboards:index [2017-10-05 14:56] arnaud [Deck info] |
projects:crazyflie2:expansionboards:index [2019-01-29 17:36] macke |
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* [[projects: | * [[projects: | ||
* [[projects: | * [[projects: | ||
- | * [[projects: | + | * [[projects: |
+ | * [[projects: | ||
+ | |||
+ | [[projects: | ||
===== Mechanical architecture ===== | ===== Mechanical architecture ===== | ||
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{{: | {{: | ||
- | The NRF51 pins can be multiplexed with any of the available NRF51 peripheral. The STM32F405RG pins can be multiplexed with more functions, see datasheets | + | * The Crazyflie 2.0 is a 3.0V system, meaning a high output will be 3.0V but still compatible with a 3.3V system. |
+ | * VCC can supply max 100mA | ||
+ | * VCOM can supply max 1.0A | ||
+ | * All IO pins are 5V tolerant except PA5 and the NRF51 pins | ||
+ | * The NRF51 pins can be multiplexed with any of the available NRF51 peripheral. | ||
+ | * The STM32F405RG pins can be multiplexed with more functions. | ||
+ | |||
+ | For full specification | ||
===== Expansion board detection ===== | ===== Expansion board detection ===== | ||
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| 0xBC | 0x0A | bcFlow | Flow | 1.6g | ~40mA | Below | [[projects: | | 0xBC | 0x0A | bcFlow | Flow | 1.6g | ~40mA | Below | [[projects: | ||
| 0xBC | 0x0B | bcOA | Obstacle Avoidance | N/A | ~0.3mA | Above | N/A | N/A | | | 0xBC | 0x0B | bcOA | Obstacle Avoidance | N/A | ~0.3mA | Above | N/A | N/A | | ||
+ | | 0xBC | 0x0C | bcMultiranger | Multi-ranger | N/A | ~90mA (depending on mode) | Above | N/A | N/A | | ||
+ | | 0xBC | 0x0D | bcMocap | Mocap marker deck | N/A | 0mA | Above | N/A | N/A | | ||
+ | | 0xBC | 0x0E | bcZRanger2 | Z-Ranger v2 | 1.3g | ~15mA | Below | N/A | N/A | | ||
+ | | 0xBC | 0x0F | bcFlow2 | Flow v2 | 1.6g | ~40mA | Below | N/A | N/A | | ||
+ | | 0xBC | 0x10 | bcLighthouse4 | Lighthouse-4 | 2.7g | ~40mA | Above | N/A | N/A | | ||
+ | |||
===== Deck pin allocation ===== | ===== Deck pin allocation ===== | ||
- | Below is a table showing which pins each deck uses. The table also contains information about boards that are not released yet, these are subject to change. Assignments in parenthesis are connected | + | Below is a table showing which pins each deck uses. The table also contains information about boards that are not released yet, these are subject to change. |
+ | |||
+ | Assignments in parenthesis are unconnected but connectable | ||
| | | | ||
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| bcFlow | | | X | X | | //(X)// | X | | | | X | X | X | | | VCC | | | bcFlow | | | X | X | | //(X)// | X | | | | X | X | X | | | VCC | | ||
| bcOA | | | X | X | | | | | | | | | | | | VCC | | | bcOA | | | X | X | | | | | | | | | | | | VCC | | ||
+ | | bcMultiranger | | | X | X | | | | | | | | | | | | VCOM | | ||
+ | | bcMocap | | | | | | //(X)// | //(X)// | | | | | | | | | N/A | | ||
+ | | bcLighthouse4 | X | X | X | X | | | | | | | | | | | | N/A | | ||